毕业论文 信号发生器设计与制作--显示模块的设计与实现.doc
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毕业论文 信号发生器设计与制作--显示模块的设计与实现,摘 要在现代先进的电子系统的前端和后端都将应用到a／d转换器，以改善数字处理技术的性能。在各种a／d转换器中，逐次逼近型a／d转换器是采样率低于5 msps(每秒百万次采样)的中等至高等分辨率应用的常见结构。由于逐次逼近型a／d转换器具有低功耗、小尺寸的特点，因此有很宽的应用范围。 本文设计的8位逐次逼近a／d转换器，...
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摘 要
在现代先进的电子系统的前端和后端都将应用到A／D转换器，以改善数字处理技术的性能。在各种A／D转换器中，逐次逼近型A／D转换器是采样率低于5 Msps(每秒百万次采样)的中等至高等分辨率应用的常见结构。由于逐次逼近型A／D转换器具有低功耗、小尺寸的特点，因此有很宽的应用范围。 本文设计的8位逐次逼近A／D转换器，采用了以D／A转换器、比较器和带隙基准模块为主体的结构，通过各个模块的优化设计，得到了可在4.5V-5.5V单电源电压下工作的中速、低功耗8位逐次逼近A／D转换器。 D／A转换器模块采用了扩展分辨率的方法，将电阻分压和电容分压相结合，得到了不同缩放方式的DAC组合，扩展D／A转换器分辨率，也提高了转换速度。比较器模块采用了三级比较器通过电容耦合级联的方式来实现，具有高增益的特点，结果所设计的比较器既满足了高速比较的要求，又有效降低了功耗。最后，在A／D转换器中基准电压模块也是一个很重要的组成部分，它直接关系A／D转换器的精度。本文中自主设计的带隙基准电路具有很高的抗电源电压波动和抗温度变化的能力，温度在-50℃-100℃、电源电压在1.6V-9.7V范围内变化时能使输出保持在1.246V。 应用Cadence spectre采用CSMC 0.6μm CMOS Nwell工艺库对电路性能进行验证。仿真结果表明，设计的高速比较器、带隙基准电路和D／A转换器满足8位A／D转换的要求。
Abstract
In the front and the end of the advanced electronics systems, analog to digital converters (A/D converters) are applied to improve the performance of the digital processing technique. Of all kinds of A/D converters, successive approximation (SAR)A/D converters are frequently the architecture of choice for medium-to-high-resolution applications with sample rates under 5 mega samples per second (Msps). Because of providing low power consumption as well as a small scale factor, SAR A/D converters have a wide variety of applications.A 8-bit medium speed, low power A/D designed in this paper, is composed of digital-analog (D/A) converters, comparators ,bandgap and so on. By optimizing the performances of every module, it can operate well from from a signal 4.5V to 5.5V power supply.In D/A coverter module, in order to extend the resolution of D/A converter, the combination of differently scaled DACs is designed. A charge scaling D/A converter with capacitor voltage divider and resistance divider is designed, which extends the resolution of a parallel D/A converter as well as improve speed rate greatly. The comparator has the character of high gain with the structure of three-stage coupled capacitance, which reduces power consumption as well as satisfies the requirement of high speed comparator. Bandgap voltage circuits is an important module for A/D converter, which affects the accuracy of A/D converter. The bandgap designed in this paper has the capability of anti-fluctuation of power supply and temperature. It can work from a signal 4.5V to 5.5V power supply and from -50℃ to 100℃ temperature and always get 1.246V output voltage.By using the CSMC 0.6 μm CMOS Nwell technology, the circuits are verified in circumstances of Cadence spectre with Unix operating system. The simulation shows that the high speed comparator, the D/A converter and the bandgap meet the requirements of the 8-bit A/D converter, and the SAR A/D converter can work well.
目 录
摘 要 I
Abstract I
目 录 III
前言 IV
第一章 绪论 1
第二章总体方案 2
2.1 方案选择 2
2.2 方案设计的基本思路 2
第三章 硬件设计与分析 4
3.1 常用单片机的特点比较及本设计单片机的选择 4
3.2 AT89S52单片机性能简介 4
3.3 常用显示简介 7
3.4 A/D转换芯片AD0804 11
3.5 采样保值电路 13
第四章 软件设计与分析 16
4.1系统软件设计主流程图 16
4.2系统软件的A/D转换流程图 17
4.3 显示流程 18
第五章 调试与分析 19
5.1 样机的装接分析与调试 19
5.2 多功能版的装接分析与调试 23
第六章 总论 26
6.1 结论与展望 26
6.2 单片机的发展趋势 26
致 谢 28
参考资料 29
附录 30
在现代先进的电子系统的前端和后端都将应用到A／D转换器，以改善数字处理技术的性能。在各种A／D转换器中，逐次逼近型A／D转换器是采样率低于5 Msps(每秒百万次采样)的中等至高等分辨率应用的常见结构。由于逐次逼近型A／D转换器具有低功耗、小尺寸的特点，因此有很宽的应用范围。 本文设计的8位逐次逼近A／D转换器，采用了以D／A转换器、比较器和带隙基准模块为主体的结构，通过各个模块的优化设计，得到了可在4.5V-5.5V单电源电压下工作的中速、低功耗8位逐次逼近A／D转换器。 D／A转换器模块采用了扩展分辨率的方法，将电阻分压和电容分压相结合，得到了不同缩放方式的DAC组合，扩展D／A转换器分辨率，也提高了转换速度。比较器模块采用了三级比较器通过电容耦合级联的方式来实现，具有高增益的特点，结果所设计的比较器既满足了高速比较的要求，又有效降低了功耗。最后，在A／D转换器中基准电压模块也是一个很重要的组成部分，它直接关系A／D转换器的精度。本文中自主设计的带隙基准电路具有很高的抗电源电压波动和抗温度变化的能力，温度在-50℃-100℃、电源电压在1.6V-9.7V范围内变化时能使输出保持在1.246V。 应用Cadence spectre采用CSMC 0.6μm CMOS Nwell工艺库对电路性能进行验证。仿真结果表明，设计的高速比较器、带隙基准电路和D／A转换器满足8位A／D转换的要求。
Abstract
In the front and the end of the advanced electronics systems, analog to digital converters (A/D converters) are applied to improve the performance of the digital processing technique. Of all kinds of A/D converters, successive approximation (SAR)A/D converters are frequently the architecture of choice for medium-to-high-resolution applications with sample rates under 5 mega samples per second (Msps). Because of providing low power consumption as well as a small scale factor, SAR A/D converters have a wide variety of applications.A 8-bit medium speed, low power A/D designed in this paper, is composed of digital-analog (D/A) converters, comparators ,bandgap and so on. By optimizing the performances of every module, it can operate well from from a signal 4.5V to 5.5V power supply.In D/A coverter module, in order to extend the resolution of D/A converter, the combination of differently scaled DACs is designed. A charge scaling D/A converter with capacitor voltage divider and resistance divider is designed, which extends the resolution of a parallel D/A converter as well as improve speed rate greatly. The comparator has the character of high gain with the structure of three-stage coupled capacitance, which reduces power consumption as well as satisfies the requirement of high speed comparator. Bandgap voltage circuits is an important module for A/D converter, which affects the accuracy of A/D converter. The bandgap designed in this paper has the capability of anti-fluctuation of power supply and temperature. It can work from a signal 4.5V to 5.5V power supply and from -50℃ to 100℃ temperature and always get 1.246V output voltage.By using the CSMC 0.6 μm CMOS Nwell technology, the circuits are verified in circumstances of Cadence spectre with Unix operating system. The simulation shows that the high speed comparator, the D/A converter and the bandgap meet the requirements of the 8-bit A/D converter, and the SAR A/D converter can work well.
目 录
摘 要 I
Abstract I
目 录 III
前言 IV
第一章 绪论 1
第二章总体方案 2
2.1 方案选择 2
2.2 方案设计的基本思路 2
第三章 硬件设计与分析 4
3.1 常用单片机的特点比较及本设计单片机的选择 4
3.2 AT89S52单片机性能简介 4
3.3 常用显示简介 7
3.4 A/D转换芯片AD0804 11
3.5 采样保值电路 13
第四章 软件设计与分析 16
4.1系统软件设计主流程图 16
4.2系统软件的A/D转换流程图 17
4.3 显示流程 18
第五章 调试与分析 19
5.1 样机的装接分析与调试 19
5.2 多功能版的装接分析与调试 23
第六章 总论 26
6.1 结论与展望 26
6.2 单片机的发展趋势 26
致 谢 28
参考资料 29
附录 30
