硕士毕业论文 现场可编程门阵列(fpga)模拟电路设计研究.rar
硕士毕业论文 现场可编程门阵列(fpga)模拟电路设计研究,摘要fpga是英文field programmable gate array的缩写，即现场可编程门阵列，是在pal、gal、epld等可编程器件基础上进一步发展的产物。作为专用集成电路(asic)领域中的一种半定制电路产品，该产品既解决了定制电路的不足，又避免了原有可编程器件门电路资源有限的缺点。随着工艺尺寸的逐渐减小...
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内容介绍
原文档由会员 ljjwl8321 发布
摘 要
FPGA是英文Field Programmable Gate Array的缩写，即现场可编程门阵列，是在PAL、GAL、EPLD等可编程器件基础上进一步发展的产物。作为专用集成电路(ASIC)领域中的一种半定制电路产品，该产品既解决了定制电路的不足，又避免了原有可编程器件门电路资源有限的缺点。随着工艺尺寸的逐渐减小，现场可编程门阵列FPGA与专用集成电路ASIC之间的性能差异正在逐渐减小。相比较ASIC而言，由于FPGA 的动态可重配置特性极大降低了电路设计公司在产品设计过程中的设计风险与设计成本，缩短了产品上市的时间，减少了用户升级系统所带来的硬件花费。因此，越来越多的电路设计公司开始逐渐使用FPGA作为产品研发与测试的硬件平台。
本课题来源为总装备部国防技术重点预研项目和国家863研究发展计划中“可编程逻辑器件”课题的子项目。课题的目的是研究工作电压为2.5 V 的FPGA芯片中模拟电路的设计方法，其研究范围主要包括I/O接口电路和FPGA芯片的电源模块。本课题打破了FPGA核心关键设计技术和产品制造被国外公司所垄断的不利局面，满足了国防和工业生产的需要。
本论文采用正向和逆向相结合的设计方法，以正向设计思想为指导方向，同时借鉴国外先进的设计经验，以研制支持多达16种高性能接口标准的可动态配置I/O端口，最高工作频率为200MHz，可用逻辑资源为10万门，内部包含总量达40K的用户可用RAM阵列，消耗晶体管个数为530万的现场可编程门阵列FPGA芯片为突破口，完成了可用I/O管脚资源为180、404和512的系列FPGA产品模拟电路的设计。其中I/O管脚资源为180的FPGA产品具有小于4.8ns的输入延时和小于4.0ns的输出延迟，并能够满足FPGA芯片200MHz的最高工作频率。
本文中的电路采用TSMC 0.22um 1P5M标准CMOS工艺制程，使用全定制电路与版图设计方法。经仿真验证，该系列FPGA产品所达到的主要技术参数指标，均优于国外同类产品水平。
本文的主要创新点为利用SRAM技术的在系统可编程特性，结合模拟电路设计方法的特点，提供了一种能够同时满足多标准接口应用与可动态配置要求的I/O接口电路结构。该结构相比过去的各种I/O接口电路结构而言，不但节约了芯片面积，而且能够支持多种不同的接口标准。
本文所设计的多标准高性能接口电路已应用在采用陶瓷封装形式的FPGA中，该产品解决了国外同类型产品没有军品级器件的问题，满足重点军事工程的需求。
本文所设计的电路已完成后端版图设计与仿真验证，目前处于流片阶段，其他系列产品的设计均按型谱项目的进度要求正在进行中。该系列产品的研制成功打破了国外对该系列器件的禁运，为我军关键电子元器件的国产化贡献了力量。
关键词：FPGA 可动态配置I/O 多标准 5V容许 Weak-Keeper
ABSTRACT
FPGA was the abbreviation of the Field Programmable Gate Array .It was base on the programmable divices ,such as PAL and EPLD.It offset the ASIC's disadvantage whose logic resouce was too less.With the character size smaller and smaller ,the distance of performance between FPGA and ASIC was smaller and smaller.But FPGA decreased the risk and cost in the product design, for its character of the dynamic reuse ,and shorten the time which the product come into the market.And more and more Fabless began to use it as the design and test platform.
This research subject came from Hi-Tech Research and Development Program of China and General Equipment Headquarters. It aimed at developing series products of 2.5v FPGA, including I/O interface circuit and power system, breaking through the adverse situation as all of the FPGA products and design technology were monopolized by several American companies, and satisfying urgent demands of national defence.
A method of “top-down” design and reverse design was adopted in this paper. We took the idea of “top-down” design as guidance, as well as used foreign advanced design experience for reference and developed a FPGA containing 20*30 CLB-arrays, an internal counter of 200MHz, 100K gates，supporting 16 high-performance interface standards as a breakthrough, a series of FPGA family products, whose maximum available I/O number is 180 , 404 and 512, have been developed respectively. The 180-I/O FPGA has a 4.8ns pin-to-pin input delay and 4.0ns pin-to-pin output delay or less.
This paper was based on a 0.22um 1P5M standard CMOS technology process, and on a design technology of custom layout. The primary technology parameters of the FPGA family products accomplish the foreign advanced level of kindred products.
New idea of our research subject was a new I/O cicuit structure by using the SRAM array design to realize in-system programmable and the characters of analog cicuit design.This structure can reduce the chip area and give higher performance.
The 180-I/O FPGA chip with ceramic packages solved the problem that there were no military devices in foreign kindred products and satisfied the requirement of important military engineering.
This product has been finished the layout design.Other designs of the FPGA series were completed and were ahead of the schedule of plan. The products were used and approbated by many customer, we broke the forbiddance for the devices by foreign countries, and contributed that the key device can be established in China for our army.
Keywords: FPGA Dynamic-configuration I/O Multi-standards 5V-tolerance Weak-keeper
目 录
第一章 绪 论 1
1.1 课题的背景和意义 1
1.1.1 现场可编程门阵列简介 2
1.1.2 SRAM编程技术介绍 3
1.1.3 FPGA..
FPGA是英文Field Programmable Gate Array的缩写，即现场可编程门阵列，是在PAL、GAL、EPLD等可编程器件基础上进一步发展的产物。作为专用集成电路(ASIC)领域中的一种半定制电路产品，该产品既解决了定制电路的不足，又避免了原有可编程器件门电路资源有限的缺点。随着工艺尺寸的逐渐减小，现场可编程门阵列FPGA与专用集成电路ASIC之间的性能差异正在逐渐减小。相比较ASIC而言，由于FPGA 的动态可重配置特性极大降低了电路设计公司在产品设计过程中的设计风险与设计成本，缩短了产品上市的时间，减少了用户升级系统所带来的硬件花费。因此，越来越多的电路设计公司开始逐渐使用FPGA作为产品研发与测试的硬件平台。
本课题来源为总装备部国防技术重点预研项目和国家863研究发展计划中“可编程逻辑器件”课题的子项目。课题的目的是研究工作电压为2.5 V 的FPGA芯片中模拟电路的设计方法，其研究范围主要包括I/O接口电路和FPGA芯片的电源模块。本课题打破了FPGA核心关键设计技术和产品制造被国外公司所垄断的不利局面，满足了国防和工业生产的需要。
本论文采用正向和逆向相结合的设计方法，以正向设计思想为指导方向，同时借鉴国外先进的设计经验，以研制支持多达16种高性能接口标准的可动态配置I/O端口，最高工作频率为200MHz，可用逻辑资源为10万门，内部包含总量达40K的用户可用RAM阵列，消耗晶体管个数为530万的现场可编程门阵列FPGA芯片为突破口，完成了可用I/O管脚资源为180、404和512的系列FPGA产品模拟电路的设计。其中I/O管脚资源为180的FPGA产品具有小于4.8ns的输入延时和小于4.0ns的输出延迟，并能够满足FPGA芯片200MHz的最高工作频率。
本文中的电路采用TSMC 0.22um 1P5M标准CMOS工艺制程，使用全定制电路与版图设计方法。经仿真验证，该系列FPGA产品所达到的主要技术参数指标，均优于国外同类产品水平。
本文的主要创新点为利用SRAM技术的在系统可编程特性，结合模拟电路设计方法的特点，提供了一种能够同时满足多标准接口应用与可动态配置要求的I/O接口电路结构。该结构相比过去的各种I/O接口电路结构而言，不但节约了芯片面积，而且能够支持多种不同的接口标准。
本文所设计的多标准高性能接口电路已应用在采用陶瓷封装形式的FPGA中，该产品解决了国外同类型产品没有军品级器件的问题，满足重点军事工程的需求。
本文所设计的电路已完成后端版图设计与仿真验证，目前处于流片阶段，其他系列产品的设计均按型谱项目的进度要求正在进行中。该系列产品的研制成功打破了国外对该系列器件的禁运，为我军关键电子元器件的国产化贡献了力量。
关键词：FPGA 可动态配置I/O 多标准 5V容许 Weak-Keeper
ABSTRACT
FPGA was the abbreviation of the Field Programmable Gate Array .It was base on the programmable divices ,such as PAL and EPLD.It offset the ASIC's disadvantage whose logic resouce was too less.With the character size smaller and smaller ,the distance of performance between FPGA and ASIC was smaller and smaller.But FPGA decreased the risk and cost in the product design, for its character of the dynamic reuse ,and shorten the time which the product come into the market.And more and more Fabless began to use it as the design and test platform.
This research subject came from Hi-Tech Research and Development Program of China and General Equipment Headquarters. It aimed at developing series products of 2.5v FPGA, including I/O interface circuit and power system, breaking through the adverse situation as all of the FPGA products and design technology were monopolized by several American companies, and satisfying urgent demands of national defence.
A method of “top-down” design and reverse design was adopted in this paper. We took the idea of “top-down” design as guidance, as well as used foreign advanced design experience for reference and developed a FPGA containing 20*30 CLB-arrays, an internal counter of 200MHz, 100K gates，supporting 16 high-performance interface standards as a breakthrough, a series of FPGA family products, whose maximum available I/O number is 180 , 404 and 512, have been developed respectively. The 180-I/O FPGA has a 4.8ns pin-to-pin input delay and 4.0ns pin-to-pin output delay or less.
This paper was based on a 0.22um 1P5M standard CMOS technology process, and on a design technology of custom layout. The primary technology parameters of the FPGA family products accomplish the foreign advanced level of kindred products.
New idea of our research subject was a new I/O cicuit structure by using the SRAM array design to realize in-system programmable and the characters of analog cicuit design.This structure can reduce the chip area and give higher performance.
The 180-I/O FPGA chip with ceramic packages solved the problem that there were no military devices in foreign kindred products and satisfied the requirement of important military engineering.
This product has been finished the layout design.Other designs of the FPGA series were completed and were ahead of the schedule of plan. The products were used and approbated by many customer, we broke the forbiddance for the devices by foreign countries, and contributed that the key device can be established in China for our army.
Keywords: FPGA Dynamic-configuration I/O Multi-standards 5V-tolerance Weak-keeper
目 录
第一章 绪 论 1
1.1 课题的背景和意义 1
1.1.1 现场可编程门阵列简介 2
1.1.2 SRAM编程技术介绍 3
1.1.3 FPGA..
