基于fpga与dsp的北斗gps兼容型.doc
约85页DOC格式手机打开展开
基于fpga与dsp的北斗gps兼容型,摘要目前，gnss（global navigation satellite system）卫星导航定位技术正在快速发展，其在测绘、导航、天文、通讯等多个领域的应用也正在推广，许多国家地区都在积极的开发和应用gnss接收机。国外的一些公司和研究机构已拥有篅@墒斓膅nss接收机研制技术；而我国大部分gnss的应用设计还需要...
内容介绍
此文档由会员 违规屏蔽12 发布
摘 要
目前，GNSS（Global Navigation Satellite System）卫星导航定位技术正在快速发展，其在测绘、导航、天文、通讯等多个领域的应用也正在推广，许多国家地区都在积极的开发和应用GNSS接收机。国外的一些公司和研究机构已拥有篅@墒斓腉NSS接收机研制技术；而我国大部分GNSS的应用设计还需要依赖国外OEM产品。正逢北斗卫星导航系统建设部署之际，为了实现导航接收机自主创新和对北斗导航系统的支持，研制适合北斗系统并兼容其他导航系统的自主高性能GNSS接收机已成为必然。
本文以原公司有关GNSS接收机的研发设计为研究背景，在对接收机设计整体把握的基础上，实现了基于现场可编程逻辑门阵列（FPGA）和高速数字信号处理器（DSP）嵌入式北斗/GPS兼容型接收机的设计，选择TMS320C6747作为平台进行系统开发，通过基带环路的改进设计，并选择使用最为广泛的最小二乘算法为导航算法，提高接收机的捕获、跟踪性能和导航解算速度。主要进行了基带部分的设计与程序移值，并在系统设计完成后进行了射频、基带部分的测试以及整机静态、动态和耐高低温、抗冲击振动试验，经过试验和充分的数据分析比对，证实本文设计的接收机已达到了商用接收机的性能要求，具有尺寸小、精度高、动态性能好、耐高低温和抗冲击等特点。
论文主要工作包括以下几方面内容：
1.研究GNSS卫星导航定位的基本原理及定位信息的解算过程，针对本课题所设计系统选取适合的导航算法，并对接收机的捕获、跟踪环路进行研究和改进设计。
2.研究北斗/GPS双模接收机的整体结构，掌握各个模块的功能及实现方法；掌握嵌入式系统开发的基本方法，根据系统对DSP芯片的性能要求，选出适合本系统的DSP芯片并进行接收机基带部分程序移植。
3.在一款基于DSP的开发板上搭建嵌入式系统平台：包括微处理器及外围电路、存储器、RS232串口等硬件调试平台的建立。
4.在硬件设计的基础上，对系统软件进行设计，包括DSP应用软件的开发、基于DSP/BIOS的多任务设计、中断服务子程序的设计等，并在上述平台上进行验证。
5.分别对所设计系统的射频前端、基带环路进行测试，并对系统整体进行动、静态和高低温、抗冲击测试试验。最后对试验数据分析并进行性能比较，得出结论。
本文立足于接收机系统的实时性、高效性、可靠性，提出并完成基于FPGA与 DSP嵌入式北斗/GPS兼容型接收机设计，期待能够为以后的北斗/GPS双模接收机技术研究提供可以借鉴的研究方法和实现过程。
关键词 GNSS接收机；FPGA；DSP；北斗/GPS兼容；测试试验；
Abstract
At present, the GNSS satellite navigation and positioning technology is rapidly developing, being applied broadly in mapping, navigation, astronomy and communication, many countries are actively developing and applying GNSS receiver. Some overseas companies and research institutes have been equipped with mature GNSS receiver development technology, however, most of our country's application of GNSS still rely on foreign countries' OEM products. Coming across the deployment of the construction of Beidou satellite navigation system, in order to realize the innovation and of the navigation receiver and support the Beidou satellite navigation system, it is inevitable to develop the independent innovative and high-performance GNSS receiver which is suitable to the Beidou satellite navigation system and compatible with other navigation system.
This thesis is unfolded against the background of the research and design of GNSS. Based on the whole master of the receiver design, it realizes the Beidou/GPS bimodal receiver design in view of the live FPGA and DSP, it chooses the TMSC6747 as the platform for systematic exploitation with the high speed parallel FPGA as the baseband loop partial management. Through the improved design of the baseband loop, choosing the most popular two multiplication algorithm of Navigation algorithms, improving the function of capture, monitor and navigating. After the design of baseband loop, we have the test of RF, baseband loop and action, static state, temperature, and impact resistance tests, and at last a conclusion will be drawn through the analysis and compassion of the data, which has approved that our receiver has meet the need of commercial function, consisting the properties of smaller size, high accuracy, better motivity, anti-high temperature and anti-shock.
This thesis mainly includes the following contents:
1. To study the fundamental principle of GNSS satellite navigation, positioning, and the decoding process of positioning. Based on the systems designed in this task, the appropriate navigation algorithms will be chosen. What is more, the capture and tracking loop of the receiver will also be studied and improved.
2. By studying the integral structure of Beidou/GPS bimodal receiver, the thesis aims to master the functions and implementation methods of each module, the basic method of embedded system exploiting. What is more, based on performance requirements for DSP chip, the appropriate chip will be chosen out and the transplanting of Receiver’s baseband parts will be simultaneously performed
3. To set up an embedded system platform for on one kind of development board which is based on DSP, and the platform includes the establishment of hardware debugging platform (hardware includes microprocessor, peripheral circuit, memorizer and RS232 serial port).
4. Except for the hardware design, the system software design is also p..
目前，GNSS（Global Navigation Satellite System）卫星导航定位技术正在快速发展，其在测绘、导航、天文、通讯等多个领域的应用也正在推广，许多国家地区都在积极的开发和应用GNSS接收机。国外的一些公司和研究机构已拥有篅@墒斓腉NSS接收机研制技术；而我国大部分GNSS的应用设计还需要依赖国外OEM产品。正逢北斗卫星导航系统建设部署之际，为了实现导航接收机自主创新和对北斗导航系统的支持，研制适合北斗系统并兼容其他导航系统的自主高性能GNSS接收机已成为必然。
本文以原公司有关GNSS接收机的研发设计为研究背景，在对接收机设计整体把握的基础上，实现了基于现场可编程逻辑门阵列（FPGA）和高速数字信号处理器（DSP）嵌入式北斗/GPS兼容型接收机的设计，选择TMS320C6747作为平台进行系统开发，通过基带环路的改进设计，并选择使用最为广泛的最小二乘算法为导航算法，提高接收机的捕获、跟踪性能和导航解算速度。主要进行了基带部分的设计与程序移值，并在系统设计完成后进行了射频、基带部分的测试以及整机静态、动态和耐高低温、抗冲击振动试验，经过试验和充分的数据分析比对，证实本文设计的接收机已达到了商用接收机的性能要求，具有尺寸小、精度高、动态性能好、耐高低温和抗冲击等特点。
论文主要工作包括以下几方面内容：
1.研究GNSS卫星导航定位的基本原理及定位信息的解算过程，针对本课题所设计系统选取适合的导航算法，并对接收机的捕获、跟踪环路进行研究和改进设计。
2.研究北斗/GPS双模接收机的整体结构，掌握各个模块的功能及实现方法；掌握嵌入式系统开发的基本方法，根据系统对DSP芯片的性能要求，选出适合本系统的DSP芯片并进行接收机基带部分程序移植。
3.在一款基于DSP的开发板上搭建嵌入式系统平台：包括微处理器及外围电路、存储器、RS232串口等硬件调试平台的建立。
4.在硬件设计的基础上，对系统软件进行设计，包括DSP应用软件的开发、基于DSP/BIOS的多任务设计、中断服务子程序的设计等，并在上述平台上进行验证。
5.分别对所设计系统的射频前端、基带环路进行测试，并对系统整体进行动、静态和高低温、抗冲击测试试验。最后对试验数据分析并进行性能比较，得出结论。
本文立足于接收机系统的实时性、高效性、可靠性，提出并完成基于FPGA与 DSP嵌入式北斗/GPS兼容型接收机设计，期待能够为以后的北斗/GPS双模接收机技术研究提供可以借鉴的研究方法和实现过程。
关键词 GNSS接收机；FPGA；DSP；北斗/GPS兼容；测试试验；
Abstract
At present, the GNSS satellite navigation and positioning technology is rapidly developing, being applied broadly in mapping, navigation, astronomy and communication, many countries are actively developing and applying GNSS receiver. Some overseas companies and research institutes have been equipped with mature GNSS receiver development technology, however, most of our country's application of GNSS still rely on foreign countries' OEM products. Coming across the deployment of the construction of Beidou satellite navigation system, in order to realize the innovation and of the navigation receiver and support the Beidou satellite navigation system, it is inevitable to develop the independent innovative and high-performance GNSS receiver which is suitable to the Beidou satellite navigation system and compatible with other navigation system.
This thesis is unfolded against the background of the research and design of GNSS. Based on the whole master of the receiver design, it realizes the Beidou/GPS bimodal receiver design in view of the live FPGA and DSP, it chooses the TMSC6747 as the platform for systematic exploitation with the high speed parallel FPGA as the baseband loop partial management. Through the improved design of the baseband loop, choosing the most popular two multiplication algorithm of Navigation algorithms, improving the function of capture, monitor and navigating. After the design of baseband loop, we have the test of RF, baseband loop and action, static state, temperature, and impact resistance tests, and at last a conclusion will be drawn through the analysis and compassion of the data, which has approved that our receiver has meet the need of commercial function, consisting the properties of smaller size, high accuracy, better motivity, anti-high temperature and anti-shock.
This thesis mainly includes the following contents:
1. To study the fundamental principle of GNSS satellite navigation, positioning, and the decoding process of positioning. Based on the systems designed in this task, the appropriate navigation algorithms will be chosen. What is more, the capture and tracking loop of the receiver will also be studied and improved.
2. By studying the integral structure of Beidou/GPS bimodal receiver, the thesis aims to master the functions and implementation methods of each module, the basic method of embedded system exploiting. What is more, based on performance requirements for DSP chip, the appropriate chip will be chosen out and the transplanting of Receiver’s baseband parts will be simultaneously performed
3. To set up an embedded system platform for on one kind of development board which is based on DSP, and the platform includes the establishment of hardware debugging platform (hardware includes microprocessor, peripheral circuit, memorizer and RS232 serial port).
4. Except for the hardware design, the system software design is also p..
