低速率语音编解码专用芯片的设计.doc
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低速率语音编解码专用芯片的设计,全文约4400字论述翔实 文 摘 为了满足可视电话系统对高质量，低成本语音编解码器的需要，采用数字信号处理器内核(dsp core)的方法，设计了符合itu-t g.723.1建议的5.3kbit/s和6.3kbit/s双速率语音编解码器专用芯片。针对g.723.1算法特点，进行算法优化...
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低速率语音编解码专用芯片的设计
全文约4400字 论述翔实
文 摘 为了满足可视电话系统对高质量，低成本语音编解码器的需要，采用数字信号处理器内核(DSP Core)的方法，设计了符合ITU-T G.723.1建议的5.3kbit/s和6.3kbit/s双速率语音编解码器专用芯片。针对G.723.1算法特点，进行算法优化，如变卷积运算为加/减运算，避开求余运算等，并对需要最大运算量的情况作了模拟，保证语音编解码器在最坏情况下也能正常工作。根据专用芯片的结构，设计了编解码器的流程和接口模块，用较少的运算量和较小的存储空间，实时实现了G.723.1建议及其附录A的全部功能和选项，并通过了全套测试序列的检验，而且留出足够多的资源实现自适应回声抵消、调制解调等其它功能。
关键词 低速率语音编码，专用芯片，可视电话
分类号 TN 912.3
ASIC design for low bit rate speech coding
JIA Zhike，CUI Huijuan，TANG Kun，FENG Chongxi
Department of Electronic Engineering,Tsinghua University，Beijing 100084，China
Abstract In order to get a high quality and low cost speech coder for videophone system，an ASIC (Application Specific Integrated Circuit) was designed using DSP core. The speech coder complies with ITU-T Recommendation G.723.1 (dual rate speech coder for multimedia communications transmitting at 5.3 & 6.3kbit/s). According to the features of the G.723.1 algorthm and the architecture of the ASIC，some optimizations were used to reduce the computation complex and the memory size. The worst case which would cost maximum computation amount was simulated to ensure the coder can work properly in this case. The chart of the coder and its performance were presented. There is still enough resource left in this ASIC to implement the MODEM and the echo cancellator.
Key words low bit rate speech coding； ASIC (Application Specific Integrated Circuit)； videophone
参考文献
[1] 杨行峻，迟惠生，唐 昆，等. 语音信号数字处理. 北京：电子工业出版社，1995
[2] ITU-T. Draft Recommendation G.723.1 Dual rate speech coder for multimedia telecommunications transmitting at 5.3 & 6.3 kbit/s. Ocotober，1995
[3] ITU-T. Annex A to Recommendation G.723.1 Silence compression scheme for dual rate communications transmitting at 5.3 & 6.3 kbit/s. May，1996
[4] Analog Devices Inc. ADSP-2100 Family User's Manual. 1991
[5] Analog Devices Inc. ADSP-2181 Data Sheet. 1994
全文约4400字 论述翔实
文 摘 为了满足可视电话系统对高质量，低成本语音编解码器的需要，采用数字信号处理器内核(DSP Core)的方法，设计了符合ITU-T G.723.1建议的5.3kbit/s和6.3kbit/s双速率语音编解码器专用芯片。针对G.723.1算法特点，进行算法优化，如变卷积运算为加/减运算，避开求余运算等，并对需要最大运算量的情况作了模拟，保证语音编解码器在最坏情况下也能正常工作。根据专用芯片的结构，设计了编解码器的流程和接口模块，用较少的运算量和较小的存储空间，实时实现了G.723.1建议及其附录A的全部功能和选项，并通过了全套测试序列的检验，而且留出足够多的资源实现自适应回声抵消、调制解调等其它功能。
关键词 低速率语音编码，专用芯片，可视电话
分类号 TN 912.3
ASIC design for low bit rate speech coding
JIA Zhike，CUI Huijuan，TANG Kun，FENG Chongxi
Department of Electronic Engineering,Tsinghua University，Beijing 100084，China
Abstract In order to get a high quality and low cost speech coder for videophone system，an ASIC (Application Specific Integrated Circuit) was designed using DSP core. The speech coder complies with ITU-T Recommendation G.723.1 (dual rate speech coder for multimedia communications transmitting at 5.3 & 6.3kbit/s). According to the features of the G.723.1 algorthm and the architecture of the ASIC，some optimizations were used to reduce the computation complex and the memory size. The worst case which would cost maximum computation amount was simulated to ensure the coder can work properly in this case. The chart of the coder and its performance were presented. There is still enough resource left in this ASIC to implement the MODEM and the echo cancellator.
Key words low bit rate speech coding； ASIC (Application Specific Integrated Circuit)； videophone
参考文献
[1] 杨行峻，迟惠生，唐 昆，等. 语音信号数字处理. 北京：电子工业出版社，1995
[2] ITU-T. Draft Recommendation G.723.1 Dual rate speech coder for multimedia telecommunications transmitting at 5.3 & 6.3 kbit/s. Ocotober，1995
[3] ITU-T. Annex A to Recommendation G.723.1 Silence compression scheme for dual rate communications transmitting at 5.3 & 6.3 kbit/s. May，1996
[4] Analog Devices Inc. ADSP-2100 Family User's Manual. 1991
[5] Analog Devices Inc. ADSP-2181 Data Sheet. 1994
