基于pcie的复杂数据系统dma控制器设计.doc

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基于pcie的复杂数据系统dma控制器设计,基于fpga的pcie dma高速通讯接口设计孙祥龙 赵不贿 陈永 徐雷钧江苏大学电气信息工程学院,镇江,江苏,中国摘 要:随着物联网、多媒体等技术的发展,复杂、高速数据传输与控制问题突出。论文设计了一款基于fpga的高效、通用的dma引擎,用于pcie与数据系统间的高速通讯接口。该引擎具有4路异步fifo结构的dma...
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基于FPGA的PCIE DMA高速通讯接口设计
孙祥龙   赵不贿   陈永   徐雷钧
江苏大学电气信息工程学院,镇江,江苏,中国
 
摘  要:随着物联网、多媒体等技术的发展,复杂、高速数据传输与控制问题突出。论文设计了一款基于FPGA的高效、通用的DMA引擎,用于PCIE与数据系统间的高速通讯接口。该引擎具有4路异步FIFO结构的DMA上传、4路DMA下传数据通道,以及1路命令通道;命令优先级最高,多数据通道同时使用时,采用Round_Robin仲裁方式,使各个DMA 通道处于同一优先级。各通道可重配置,通过对通道配置打开与否能够减少通道轮询带来的系统资源消耗,提高系统的整体效率。经测试,单通道上、下传速率达到160MB/s,四通道上、下传总速率达到155MB/s,该接口电路性能稳定可靠,具有较好的推广价值。
关键词:通讯接口;控制器;FPGA;PCIE;DMA 

Design of PCIE DMA High-Speed Communication Interface based on FPGA
Xianglong Sun, Buhui Zhao , Yong Chen , Leijun Xu
School of Electrical and Information Engineering, Jiangsu University, Zhenjiang,Jiangsu,China

Abstract—With the development of internet of things and multimedia technology, the issues between control and high-speed data transmission become obvious. The paper designed a high-performance FPGA-based, general-purpose DMA engine  for high-speed communication interface between PCIE and data system. The engine has four DMA upstream channels and four DMA downstream channels with asynchronous FIFO, as well as a command channel; The priority for commanding is the highest, the circuit uses Round_Robin arbitration to ensure each DMA channel at the same priority level when multiple data channels work simultaneously. Each channel can be re-configured to make the channel open or not, which can reduce the channel polling resource consumption and improve the overall efficiency of the system. From the test ,the speed of a single channel upstream or downstream can reach to 160MB/s; the speeds of four channels with upstream or downstream can reach to 155MB/s. The interface is stable and reliable, it has good popularized value.
Key words—Communication interface ; Controller ; FPGA ; PCIE ; DMA